The present invention relates to a floating point digitizer comprising a wide range gain ranging amplifier and means for providing digital outputs each indicative of an analog input.
Floating point amplifiers find application in such apparatus as means for collecting and representing seismic data, for example, reflection seismographs. In seismography, it may be equally significant to resolve to as many significant bits as possible, signals in the vicinity of the analog zero level as well as signals of much higher analog levels. In order to do this, a gain ranging amplifier is used coupled to an analog-to-digital converter. Thus when a signal is low, the gain of the amplifier is increased. When the analog signal is relatively high, the gain of the amplifier is decreased. The objective is to apply analog input voltages to the analog-to-digital converter in the upper half of its dynamic range at all times so as to maximize resolution provided by the analog-to-digital converter. Change in gain can be accommodated for by using a scale factor related to the gain.
In order to handle maximum amounts of data it is desirable to increase the speed at which the gain ranging amplifier will operate and operate reliably. "Reliably" refers to maintaining the analog input to the analog-to-digital converter in the upper half of its analog dynamic range. Many prior art arrangements have been provided but have different shortcomings with respect to the goals of the present invention. One example is the circuit disclosed in U.S. Pat. No. 4,031,504, issued June 21, 1977. In the circuit illustrated therein, a gain ranging amplifier comprises a plurality of high-gain amplifiers connected in cascade between an input terminal and an output terminal. Each amplifier has a low-gain state and can be switched by a controller to a high-gain state. Voltage reference means selectively provide a discreet reference voltage to correspond with each amplifier. A comparator makes a comparison between the system's output voltage and the selected reference voltage. If the comparison shows that the reference voltage is greater than the output voltage, the controller adjusts the first amplifier to its high gain. Further comparisons are made for successive stages. This circuit provides speed limitations in that it will take a finite time for the successive by gain amplifier stages to settle to their amplifying states. Further, the nature of the input could change by the time the gains are set.
Another example is seen in U.S. Pat. No. 3,684,968, issued Aug. 15, 1972. Again, the output of a floating point amplifier is sensed and the parameters of an input signal are compared to cause a digital gain increase or gain decrease to the floating point amplifier. In both of these circuits, as well as other prior art circuits, there is an inherent speed limitation due to the time to set the gain amplifiers up for a currently incoming signal. Further, by the time that the amplifiers are set, the nature of the input could change. These and other prior art circuits either predict or assume or estimate where the amplitude of the incoming signal will be at some time later than the time at which the gain of the amplifier is set. Such predictions, assumptions, or estimations may be wrong. Such operation leads to provision of less than maximized resolution. Alternatively, clipping could result, and the signal would be converted inaccurately.